Hi,
I have compiled several programs for sbRIOs previously but have not run into compilation errors before. I can't seem to find any support to see what is actually going poorly. Any help with this would be appreciated!
The Compilation Status summary is as follows:
LabVIEW FPGA: The compilation failed due to a xilinx error.
Details:
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 87: Formal <eiosignal> has no actual or default value.
INFO:TclTasksC:1850 - process run : Synthesize - XST is done.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000032_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 106: Formal <eiosignal> has no actual or default value.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000033_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 125: Formal <eiosignal> has no actual or default value.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000034_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 144: Formal <eiosignal> has no actual or default value.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000035_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 163: Formal <eiosignal> has no actual or default value.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000036_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 182: Formal <eiosignal> has no actual or default value.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000037_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 201: Formal <eiosignal> has no actual or default value.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000038_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:432 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 220: Formal <eiosignal> has no actual or default value.
INFO:HDLCompiler:1408 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000039_CustomNode.vhd" Line 18. eiosignal is declared here
ERROR:HDLCompiler:854 - "C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd" Line 50: Unit <vhdl_labview> ignored due to previous errors.
VHDL file C:\NIFPGA\jobs\R6n310u_Z1R8lYC\NiFpgaAG_00000031_SequenceFrame.vhd ignored due to errors
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Total memory usage is 189944 kilobytes
Number of errors : 9 ( 0 filtered)
Number of warnings : 4 ( 0 filtered)
Number of infos : 0 ( 0 filtered)
Process "Synthesize - XST" failed