LabVIEW 2012 SP1 FPGA SCTL does not meet timing specifications...

Hello,

I have a NI Flex-RIO 7954R with NI 6584 IOM with LV12 SP1 FPGA design.

I have created a vi that is a simplification of my design:  called "Input SCTL Timing Example for NI.vi" (attached).

Basically, the input RX_4 goes high to request data.  When the Input Signal is high, an alternating F and T are output on TX_4.

I would expect the output to look like a 1MhZ square wave, with a period of 1000ns, since the output is in a 1MhZ SCTL loop.

However, the loop is operating at a 1.25MhZ rate, with a period of 800ns (see attached screenshot Output of 1MhZ SCTL TX_4 has 800ns Period).    

Why is the timing of an FPGA SCTL not correct?

Thanks.....