Labview 2013 SP1, FPGA 2013 SP1, RIO 13.1.1
NI 7962 with NI 5781 module.
I am attempting to run the "getting started" project for the 5781. After compiling the FPGA vi I receive the attached error.
"An error was detected in the communication between the host computer and the FPGA target.
If you are using any external clocks, make sure they are connected and within the supported specifications. also, verify that the rate of any external clocks match the specific clock rates. If you are generating your clocks internally, please contact NI Tech Support."
The result I have noticed so far is that I cannot change the output waveform when running the host vi.
Thank you for any advice.
Martin