PID control on FPGA - needs more memory to compile

Hello,

I am working on a PID controller on the FPGA module using cRIO-9076. The code is written using labview 2013 SP1.

I have used the Example project "Using Discrete PID - cRIO.lvproj" (labview\examples\control\pid\fpga.llb\CompactRIO) as a starting point, but for the host VI I replaced the plant simulator subVI with a discrete transfer function within a control & simulation loop (both found under control design & simulation module). I left everything else on the host VI and the FPGA vi pretty much the same, but somehow the host VI is not compiling because "labview needs more memory to compile VI". The code itself is pretty simple and there is plenty of memory available on the computer, so I don't understand what is causing this problem. Does anyone have any advice as to what I can do to decrease memory usage on the host VI?

Regards,

Shin