Hi All,
I am working on a cRIO project and I have some questions on the sampling. I'm not new to LabVIEW, but I am new to FPGA/ RT programming (and also the concept of sampling rate).
1. My hardware Setup
a. CRIO 9066
b. Module 1: NI 9207 (low speed voltage and current in)
c. Module 2: NI 9234 (high speed analog in)
d. Module 3: NI 9401 (digital in out)
2. Details on NI 9207:
a. Sampling rate: 500S/s non-simultaneous
b. No. of channel: 16 (8 voltage and 8 current)
3. What I want to do:
a. All 3 modules are connected on the chassis, but I am coding only for NI 9207 for now
b. To sample all 16 NI 9207 channels
c. Pass data to RT using DMA FIFO
d. Filter the data for each channel on RT
e. Find average for each channel on RT
f. FPGA sampling rate at 25Hz
g. RT loop at 1000ms (means I get 25 data point for each channel in every loop)
4. My questions:
a. Is my calculation below correct for FPGA sampling rate? If not correct, what did I do wrong?
i. 500S/s ÷ 16 channels = maximum of 31.25 data per channel every second
ii. I only need 25 data per channel and hence: 1 ÷ 40000uSec FPGA loop timer= 25Hz
b. If yes, I expect to get 25 data for each channel every time my RT loop executes. BUT, the result is not so. I only get 1 or 2 data point per channel per second. With only 1 or 2 data point, I can’t do filter or find the average.
This means that every second the buffer only gets 16 data points (1 data point for each of the 16 channels) instead of 400 data points (25 data points for each of the 16 channels). See picture below.
c. What should I change in my code in order for me to achieve what I want to do? I have attached my VIs for your reference (FPGA Test.zip).
Thank you very much in advance.