Hi All,
We purchased a new cRIO 9068 and I am trying to get it installed into a new project with some new cards. We also upgraded our projects to LV2013 - sp1. I have been unable to complete a compile of the FPGA bitfile. It runs for 25 or so minutes and when It goes to do the "final Device Utilization(map)" it fails. It looks like I might be missing something, I but I have installed and reinstalled LV2013 and the Xilinx versions (10.1, 13.4, and 14.4) That does not seem to fix the issue.
Any Ideas on what it is looking for might also be helpful since a search for "Map" did not help.
Thanks in advance.