Guys forgive the crassness of 'shouting' in the post title, but this is an idea that can drastically speed up FPGA compile times under windows, and let's face it, who wouldn't want that? What's more, it's easy to implement so if we all get behind it NI has little reason not to go for it.
PLEASE VOTE FOR THIS IDEA to see it as standard in a future release.
ALSO,
If you support this, please comment here to keep this thread bumped for maximum forum exposure.
Thanks.